The present invention generally relates to the isolation of the conductive metal elements of various metallization levels of an integrated circuit, and more particularly to a process, using air, for achieving such isolation of the conductive metal elements of the integrated circuit. The invention also relates to an integrated circuit in which at least some of the conductive metal elements of the various metallization levels of the circuit are isolated from each other by air.
The operating speed of an integrated circuit depends on its total capacitance (C). This total capacitance is made up of the capacitances of the semiconductor device (junction capacitance, gate-drain capacitance, etc.) and of the interconnect capacitance. The interconnect capacitance itself is made up of two capacitances, the capacitance between the conductive metal elements of the same metallization level, generally called the intrametallic capacitance, and the capacitance between conductive metal elements of two successive metallization levels of the integrated circuit, generally called the intermetallic capacitance.
The capacitance of the device and the interconnect capacitance respectively represent approximately 30% and 70% of the total capacitance of the integrated circuit. The advantage of reducing the larger of these two capacitances, i.e. the interconnect capacitance, is therefore immediately apparent. Moreover, the intrametallic capacitance is the largest component of the interconnect capacitance.
Air is the best known dielectric having the lowest dielectric constant, and consequently it would be desirable to be able to achieve intermetallic and intrametallic isolation in integrated circuits by via air. The article xe2x80x9cUse of Gas as Low-k Interlayer Dielectric in LSI""s: Demonstration of Feasibilityxe2x80x9d, by M. B. Anand, Masaki Yamada and Hideki Shibata (I.E.E.E. Transactions on Electron Devices, Vol. 44, No. 11, November 1997), describes a process for achieving intrametallic air isolation.
According to this process, a layer of carbon is deposited by sputtering, on the insulating film separating two adjacent metallization levels. The carbon layer has a thickness equal to the desired thickness for the conductive metal interconnect elements. Next, the recesses intended to accommodate the conductive metal elements are formed in the carbon film and metal is then deposited in these recesses by chemical vapor deposition (CVD) or physical vapor deposition (PVD), after which the assembly is subjected to conventional chemical-mechanical polishing in order to produce the conductive metal interconnect elements in the recesses.
A thin layer of insulating material having a thickness of generally about 50 nm is then deposited over the entire surface, for example a film of silicon dioxide deposited by sputtering. Next, the assembly is subjected to an oven heat treatment in an oxygen atmosphere, typically at a temperature of approximately 450xc2x0 C. The oxygen diffuses through the thin film of insulating material, reacts with the carbon and converts it into carbon dioxide so that the spaces between the conductive metal elements end up being filled with gas. The article further mentions that the process can also be used for achieving intermetallic and intrametallic isolation.
A major drawback of the process described in the above document is the use of carbon, since carbon in an unacceptable contaminant of the machines used for the fabrication of the integrated circuits. Another drawback of the process is that it requires oven heating in an oxygen atmosphere at a temperature as high as 450xc2x0 C. in order to oxidize the carbon and convert it into CO2, which may impair the integrity of the integrated circuit. Furthermore, in order to achieve air isolation, the CO2 formed must diffuse through the thin layer of SiO2, something which greatly impairs the efficiency of the process.
An object of the present invention is therefore to provide a process for achieving intermetallic and/or intrametallic air isolation in an integrated circuit which substantially eliminates the drawbacks of the prior art.
In particular, the process of the present invention avoids the use of carbon. An object of the present invention is also such a process which is simple and rapid and which does not run the risk of contaminating the machines used for the fabrication of the integrated circuits.
According to the invention, the above objectives are met by a process for achieving intermetallic and/or intrametallic air isolation of at least some of the conductive metal elements of the metallization levels of the integrated circuit, including the following steps:
a) the deposition of polycrystalline germanium in at least some of the interconnect spaces between the conductive metal elements; and
b) the removal of the polycrystalline germanium in order to form air-filled interconnect spaces between the conductive metal elements.
Polycrystalline germanium is a notable material in the process of the present invention since germanium reacts strongly with oxygen or an oxidizing agent, at room temperature, to form easily-removable compounds, namely GeO, which is volatile, GeO2, which dissolves in water, and GeOH4, which dissolves in dilute acid. It is therefore extremely easy to remove the polycrystalline germanium via, for example, suitable oxygen chemistry, such as by dissolving it in water, hydrogen peroxide or dilute H2SO4 solutions, so as to leave only air in place of the germanium for the interconnect isolation.
This dissolution by appropriate oxygen chemistry has the advantage of being able to be carried out at room temperature. Of course, the process may be carried out a temperature above room temperature, but not generally exceeding 200xc2x0 C., in order to speed up the process of removing the germanium. It is also possible to remove the germanium by an oxidizing plasma such as, for example, an oxygen or ozone plasma. Finally, germanium is not a unfavorable chemical element in the fabrication of integrated circuits and in silicon technology, since it is not a contaminant of silicon. However, if so desired, it is possible, before depositing the polycrystalline germanium, to deposit an insulating layer, for example of SiO2, in order to protect the metal elements from direct contact with the germanium.
In a first preferred embodiment of the process of the invention, intrametallic air isolation between conductive metal elements of the same metallization level is achieved by the following steps:
(1) the deposition of polycrystalline germanium in the interconnect spaces between the metal elements;
(2) the deposition of a layer of an insulation material on the metal elements and on the polycrystalline germanium;
(3) the formation of a photoresist resin mask on the layer of insulation material;
(4) the anisotropic etching of the layer of insulation material in order to form apertures in this layer which are opposite the polycrystalline germanium; and
(5) the removal of the polycrystalline germanium in order to produce air-filled interconnect spaces.
Once the polycrystalline germanium has been removed, a layer of an insulating encapsulation material may be deposited in order to close off the air-filled interconnect spaces. As a variation, some of the interconnect spaces may be filled with the insulating encapsulation material or with another solid insulating material.
In a second preferred embodiment of the process of the invention, intermetallic and intrametallic air isolation between at least some of the conductive metal elements of the metallization levels of an integrated circuit is achieved by the following steps:
(1) the deposition of polycrystalline germanium between and on the conductive metal elements of a metallization level;
(2) the formation, for this metallization level, of the desired metal vias, this formation of the vias having the result of leaving a layer of insulating material on the surface of the deposited layer of polycrystalline germanium;
(3) the formation of the conductive metal elements of an adjacent metallization level on the surface of the layer of insulating material covering the deposited layer of germanium;
(4) the etching of the layer of insulating material covering the surface of the deposited layer of germanium in order to expose the deposited layer of germanium at selected places between the metal elements of the adjacent metallization level;
(5) the repetition of steps (1) to (4) until the desired number of metallization levels has been obtained, so as to obtain a stack of the desired number of metallization levels, in which stack the deposited layers of germanium form a mass of germanium that is uninterrupted as far as the surface of the stack; and
(6) the removal of the uninterrupted mass of germanium in order to form air-filled interconnect spaces.
In a third preferred embodiment of the process of the invention, intermetallic and intrametallic air isolation between at least some of the conductive metal elements of the metallization levels of an integrated circuit is achieved by the following steps:
(1) the deposition of polycrystalline germanium between and on the conductive metal elements of a metallization level;
(2) the formation, for this metallization level, of the desired metal vias, this formation of the vias having the result of leaving a layer of insulating material on the surface of the deposited layer of polycrystalline germanium;
(3) the formation of the conductive metal elements of an adjacent metallization level on the surface of the layer of insulating material covering the deposited layer of germanium;
(4) the etching of the layer of insulating material covering the surface of the deposited layer of germanium in order to expose the deposited layer of germanium at selected places between the metal elements of the adjacent metallization level;
(5) the removal of the germanium in order to form air-filled interconnect spaces in the metallization level;
(6) the deposition of an intermetallic layer of insulating material in order to close off the air-filled interconnect spaces of the metallization level; and
(7) the repetition of steps (1) to (6) until a stack of the desired number of metallization levels having air-filled interconnect spaces is obtained.